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TerosHDL
teros-technology.teroshdl
Powerful toolbox for ASIC/FPGA: state machine viewer, linter, documentation, snippets... and more!
__ext_fst__ext_ghw__ext_gtkw__ext_ldc__ext_pdc__ext_pro__ext_sdc__ext_sv__ext_svh__ext_tcl__ext_tlv__ext_ucf__ext_v__ext_vcd__ext_vh__ext_vhd__ext_vhdl__ext_vho__ext_vl__ext_xdcasicfpgagtkw_wavebingtkw_waveconfigkeybindingslattice constraintsldcraptorsnippetSystem VerilogsystemverilogtcltkTL-VerilogtlvTransactional-Level Verilogucfucf constraintsvcdverilogvhdlvivado ucfvivado xdcxdcxdc constraintsProgramming LanguagesSnippetsFormattersLinters
Open VSX
Total downloads
12,694
Since yesterday
+44
Current version
v6.0.14
Days tracked
6
Download history
Snapshot log
| Scraped at (UTC) | Open VSX DLs | Version |
|---|---|---|
| 2026-07-03 08:30:39 | 12,694 | v6.0.14 |
| 2026-07-02 02:00:00 | 12,650 | v6.0.14 |
| 2026-07-01 02:00:00 | 12,620 | v6.0.14 |
| 2026-06-30 02:00:00 | 12,594 | v6.0.14 |
| 2026-06-29 14:14:45 | 12,588 | v6.0.14 |
| 2026-06-28 07:06:24 | 12,562 | v6.0.14 |